Embedded System Architecture Laboratory

(formerly the Computer Architecture Laboratory)

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    Dr. Sungjoo Yoo

 Contact Info
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 Mobile: 010-6450-1923
 Office: 054-279-2379
 Email: sungjoo.yoo@postech.ac.kr

 Education
 03/88 - 02/92: B.S. Dept. of Electronics, Seoul Nat'l Univ. Korea
 03/92 - 02/95: M.S. Dept. of Electronics, Seoul Nat'l Univ. Korea
 03/95 - 02/2000: Ph.D. School of Electrical Engineering, Seoul Nat'l Univ. Korea

 Professional Experience
 
TIMA Laboratory (2000.4-2001.7, 2002.3-2004.4), Researcher, embedded software for multi-core SoC, HW/SW I  interface modeling and generation, Grenoble, France.
 
Inter-university Semiconductor Research Center (2001.8-2002.2), Researcher, embedded systems design  methodology development, Seoul, Korea.
 
Samsung Electronics, System LSI, CAE Team (2004.5-2008.2), Senior Engineer, Computing Platform Team  (2008.3-2008.7), Principal Engineer, AXI-based on-chip bus design, system/RT-level low power, embedded software  performance profiling and optimization for Flash-based systems, SoC memory hierarchy optimization, Yongin-City,  Korea.

 Conference Program Committees
 1. ASPDAC: Asia-South Pacific Design Automation Conference
 - Tutorial co-chair (2008), technical program committee (2006, 2008)
 2. DATE: Design Automation & Test in Europe conference, http://www.date-conference.com
 - Topic co-chair (simulation and emulation topic, 2004), session moderator (2001-2004), master course presenter  (2002-2003), topic program committee (Network-on-Chip topic, 2006-2011)
 3. CODES+ISSS: International Conference on Hardware/Software Codesign and System Synthesis
 - Technical program committee (2004-2010)
 4. ESTiMedia: IEEE International Workshop on Embedded Systems for Real-Time Multimedia
 - Technical program committee (2005-2008)
 5. CASES: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
 - Electronic submission chair (2002), technical program committee (2006)

 Panel Participation and Session Organization
 1. Panel list, Session 53, ”°PANEL: IP Exchange - I'll Show You Mine if You'll Show Me Yours”±, DAC 2007.
 2. Session Organizer, ”°Session: New Application Areas”±, ASPDAC 2008.

 Magazine Article
 1. S. Yoo and A. A. Jerraya, "SoC-design gar mod netværk i chip-form (SoC design moves towards networked  components)", aktuel elektronik (danish megazine), no. 9, 12 Mar. 2001.

News
1. ”°DAC panelists call for IP reuse standards”±, EETimes, June 8, 2007.
http://www.eetimes.com/conf/dac/showArticle.jhtml?articleID=199902672

Tutorial Presentations
1. S. Yoo, "
Challenges and trends for MPSoC design especially on memory subsystem and low power consumption", Tutorial (MPSoC: Multiprocessor System on Chip), ASP-DAC, 2011.
2. S. Yoo, "On-chip communication", Master Course (Multiprocessor SoCs and Networks on Chip), DATE 2002 and 2003.
3. S. Yoo and A. A. Jerraya, "Introduction to Hardware Abstraction Layers for SoC", Embedded Tutorial, DATE 2003.